This invention relates to a contact structure and a production method thereof and a probe contact assembly using the contact structure, and more particularly, to a contact structure having a large number of contactors in a vertical direction and to a method for producing such a large number of contactors on a semiconductor wafer in a horizonal direction and removing the contactors from the wafer to be mounted on a substrate in a vertical direction to form the contact structure such as a contact probe assembly, probe card, IC chip, or other contact mechanism.
In testing high density and high speed electrical devices such as LSI and VLSI circuits, a high performance contact structure such as a probe card having a large number of contactors must be used. In other applications, contact structures may be used for IC packages as IC leads. The present invention is directed to a production process of such contact structures to be used in testing LSI and VLSI chips, semiconductor wafers, burn-in of semiconductor wafers and semiconductor dice, testing and burn-in of packaged semiconductor devices, printed circuit boards and the like. The present invention can also be applicable to other purposes such as forming leads or terminal pins of IC chips, IC packages or other electronic devices. However, for the convenience of explanation, the present invention is described mainly with reference to the semiconductor wafer testing.
In the case where semiconductor devices to be tested are in the form of a semiconductor wafer, a semiconductor test system such as an IC tester is usually connected to a substrate handler, such as an automatic wafer prober, to automatically test the semiconductor wafer. Such an example is shown in FIG. 1 in which a semiconductor test system has a test head 100 which is ordinarily in a separate housing and electrically connected to the test system with a bundle of cables 110. The test head 100 and a substrate handler 400 are mechanically as well as electrically connected with one another with the aid of a manipulator 500 which is driven by a motor 510. The semiconductor wafers to be tested are automatically provided to a test position of the test head 100 by the substrate handler 400.
On the test head 100, the semiconductor wafer to be tested is provided with test signals generated by the semiconductor test system. The resultant output signals from the semiconductor wafer under test (IC circuits formed on the semiconductor wafer) are transmitted to the semiconductor test system. In the semiconductor test system, the output signals are compared with expected data to determine whether the IC circuits on the semiconductor wafer function correctly.
In FIG. 1, the test head 100 and the substrate handler 400 are connected through an interface component 140 consisting of a performance board 120 (shown in FIG. 2) which is a printed circuit board having electric circuit connections unique to a test head""s electrical footprint, coaxial cables, pogo-pins and connectors. In FIG. 2, the test head 100 includes a large number of printed circuit boards 150 which correspond to the number of test channels (test pins) of the semiconductor test system. Each of the printed circuit boards 150 has a connector 160 to receive a corresponding contact terminal 121 of the performance board 120. A xe2x80x9cfrogxe2x80x9d ring 130 is mounted on the performance board 120 to accurately determine the contact position relative to the substrate handler 400. The frog ring 130 has a large number of contact pins 141, such as ZIF connectors or pogo-pins, connected to contact terminals 121, through coaxial cables 124.
As shown in FIG. 2, the test head 100 is placed over the substrate handler 400 and mechanically and electrically connected to the substrate handler through the interface component 140. In the substrate handler 400, a semiconductor wafer 300 to be tested is mounted on a chuck 180. In this example, a probe card 170 is provided above the semiconductor wafer 300 to be tested. The probe card 170 has a large number of probe contactors (such as cantilevers or needles) 190 to contact with contact targets such as circuit terminals or contact pads in the IC circuit on the semiconductor wafer 300 under test.
Electrical terminals or contact receptacles (contact pads) of the probe card 170 are electrically connected to the contact pins 141 provided on the frog ring 130. The contact pins 141 are also connected to the contact terminals 121 of the performance board 120 through the coaxial cables 124 where each contact terminal 121 is connected to the printed circuit board 150 of the test head 100. Further, the printed circuit boards 150 are connected to the semiconductor test system through the cable 110 having, for example, several hundreds of inner cables.
Under this arrangement, the probe contactors 190 contact the surface (contact target) of the semiconductor wafer 300 on the chuck 180 to apply test signals to the semiconductor wafer 300 and receive the resultant output signals from the wafer 300. The resultant output signals from the semiconductor wafer 300 under test are compared with the expected data generated by the semiconductor test system to determine whether the IC circuits on the semiconductor wafer 300 performs properly.
FIG. 3 is a bottom view of the probe card 170 of FIG. 2. In this example, the probe card 170 has an epoxy ring on which a plurality of probe contactors 190 called needles or cantilevers are mounted. When the chuck 180 mounting the semiconductor wafer 300 moves upward in FIG. 2, the tips of the cantilevers 190 contact the pads or bumps (contact targets) on the wafer 300. The ends of the cantilevers 190 are connected to wires 194 which are further connected to transmission lines (not shown) formed in the probe card 170. The transmission lines are connected to a plurality of electrodes (contact pads) 197 which are in communication with the pogo pins 141 of FIG. 2.
Typically, the probe card 170 is structured by a multi-layer of polyimide substrates having ground planes, power planes, signal transmission lines on many layers. As is well known in the art, each of the signal transmission lines is designed to have a characteristic impedance such as 50 ohms by balancing the distributed parameters, i.e., dielectric constant and magnetic permeability of the polyimide, inductances and capacitances of the signal paths within the probe card 170. Thus, the signal lines are impedance matched lines establishing a high frequency transmission bandwidth to the wafer 300 for supplying currents in a steady state as well as high current peaks generated by the device""s outputs switching in a transient state. For removing noise, capacitors 193 and 195 are provided on the probe card between the power and ground planes.
An equivalent circuit of the probe card 170 is shown in FIG. 4 to explain the limitation of the high frequency performance in the conventional probe card technology. As shown in FIGS. 4A and 4B, the signal transmission line on the probe card 170 extends from the electrode 197, the strip (impedance matched) line 196, the wire 194 and the needle or cantilever (contact structure) 190. Since the wire 194 and needle 190 are not impedance matched, these portions function as an inductor L in the high frequency band as shown in FIG. 4C. Because of the overall length of the wire 194 and needle 190 is around 20-30 mm, significant limitations will be resulted from the inductor when testing a high frequency performance of a device under test.
Other factors which limit the frequency bandwidth in the probe card 170 reside in the power and ground needles shown in FIGS. 4D and 4E. If the power line can provide large enough currents to the device under test, it will not seriously limit the operational bandwidth in testing the device. However, because the series connected wire 194 and needle 190 for supplying the power (FIG. 4D) as well as the series connected wire 194 and needle 190 for grounding the power and signals (FIG. 4E) are equivalent to inductors, the high speed current flow is seriously restricted.
Moreover, the capacitors 193 and 195 are provided between the power line and the ground line to secure a proper performance of the device under test by filtering out the noise or surge pulses on the power lines. The capacitors 193 have a relatively large value such as 10 xcexcF and can be disconnected from the power lines by switches if necessary. The capacitors 195 have a relatively small capacitance value such as 0.01 xcexcF and fixedly connected close to the DUT. These capacitors serve the function as high frequency decoupling on the power lines. In other words, the capacitors limit the high frequency performance of the probe contactor.
Accordingly, the most widely used probe contactors as noted above are limited to the frequency bandwidth of approximately 200 MHz which is insufficient to test recent semiconductor devices. In the industry, it is considered that the frequency bandwidth comparable to the tester""s capability, which is currently on the order of 1 GHz or higher, will be necessary in the near future. Further, it is desired in the industry that a probe card is capable of handling a large number of semiconductor devices, especially memories, such as 32 or more, in a parallel fashion to increase test throughput.
In the conventional technology, the probe card and probe contactors such as shown in FIG. 3 are manually made, resulting in inconsistent quality. Such inconsistent quality includes fluctuations of size, frequency bandwidth, contact forces and resistance, etc. In the conventional probe contactors, another factor making the contact performance unreliable is a temperature change under which the probe contactors and the semiconductor wafer under test have different temperature expansion ratios. Thus, under the varying temperature, the contact positions therebetween vary which adversely affects the contact force, contact resistance and bandwidth. Thus, there is a need of a contact structure with a new concept which can satisfy the requirement in the next generation semiconductor test technology.
Therefore, it is an object of the present invention to provide a contact structure having a large number of contactors for electrically contacting with contact targets with a high frequency bandwidth, high pin counts and high contact performance as well as high reliability.
It is another object of the present invention to provide a contact structure such as a probe card to establish electrical connection for testing semiconductor devices and the like, having a very high frequency bandwidth to meet the test requirements in the next generation semiconductor test technology.
It is a further object of the present invention to provide a contact structure to establish electrical connection in applications such as testing semiconductor devices, which are suitable for testing a large number of semiconductor devices in parallel at the same time.
It is a further object of the present invention to provide a contact structure and its assembly mechanism for assembling a plurality of contact structures to form a probe contact assembly of desired size with desired number of contactors mounted on the probe contact assembly.
It is a further object of the present invention to provide a method for producing a large number of contactors in a two dimensional manner on a silicon substrate, removing the contactors from the substrate and mounting the contactors on a contact substrate in a three dimensional manner to form a contact structure.
It is a further object of the present invention to provide a method for producing a large number of contactors in a two dimensional manner on a silicon substrate, transferring the contactors to an adhesive tape and removing the contactors therefrom for vertically mounting the same on a contact substrate to form a contact structure.
In the present invention, a contact structure for testing (including burn-in) semiconductor wafers, packaged LSIs or printed circuit boards (devices under test) are formed of a large number of contactors produced on a planar surface of a substrate such as a silicon substrate by a photolithography technology established in the semiconductor production process. The contact structure of the present invention can also be used as components of electronics devices such as IC leads and pins.
The first aspect of the present invention is a contact structure for establishing electrical connection with contact targets. The contact structure is formed of a contact substrate and a plurality of contactors. The contactor is comprised of an intermediate portion which is inserted in the through hole provided on the contact substrate in a vertical direction, a contact portion which is connected to the intermediate portion and positioned at one end of the contactor to function as a contact point for electrical connection with a contact target, and a base portion which is provided at other end of the contactor, and a spring portion having a cantilever shape upwardly inclined relative to the surface of the contact substrate and provided between the base portion and the intermediate portion for producing a resilient contact force when the contactor is pressed against the contact target.
Another aspect of the present invention is a method of producing the contactors in a two dimensional manner on a silicon substrate and removing therefrom for establishing a contact structure. The production method is comprised of the following steps of:
(a) forming a sacrificial layer on a surface of a silicon substrate;
(b) forming a photoresist layer on the sacrificial layer;
(c) aligning a photo mask over the photoresist layer and exposing the photoresist layer with ultraviolet light through the photo mask, the photo mask including an image of the contactors;
(d) developing patterns of the image of the contactors on a surface of the photoresist layer;
(e) forming the contactors made of conductive material in the patterns on the photoresist layer by depositing the conductive material, each of the contactors having a spring portion which is cantilever shaped between a base portion and an intermediate portion;
(f) stripping the photoresist layer off;
(g) removing the sacrificial layer by an etching process so that the contactors are separated from the silicon substrate; and
(h) mounting the contactors on a contact substrate having through holes to receive ends of the contactors therein so that at least one end of each of the contactors functions as a contact pad for electric connection.
In a further aspect, the method of the present invention further includes, after forming the contactors by depositing the conductive material, a step of placing an adhesive tape on the contactors so that upper surfaces of the contactors are attached to the adhesive tape.
In a further aspect, the method of the present invention further includes, after forming the contactors by depositing the conductive material, a step of placing an adhesive tape on the contactors on the conductive substrate so that upper surfaces of the contactors adhere to the adhesive tape wherein adhesive strength between the contactor and the adhesive tape is larger than that between the contactor and the conductive substrate, and a step of peeling the conductive substrate so that the contactors on the adhesive tape are separated from the conductive substrate.
A further aspect of the second present invention is a probe contact assembly including the contact structure of the present invention. The probe contact assembly is formed of a contact substrate having a plurality of contactors mounted on a surface thereof, a probe card for mounting the contact substrate and establishing electrical communication between the contactors and electrodes provided on the probe card, and a pin block having a plurality of contact pins to interface between the probe card and a semiconductor test system when the pin block is attached to the probe card.
The contactors are mounted vertically on a horizontal surface of the contact surface. Each contactor is comprised of an intermediate portion which is inserted in the through hole provided on the contact substrate in a vertical direction, a contact portion which is connected to the intermediate portion and positioned at one end of the contactor to function as a contact point for electrical connection with a contact target, and a base portion which is provided at other end of the contactor, and a spring portion having a cantilever shape upwardly inclined relative to the surface of the contact substrate and provided between the base portion and the intermediate portion for producing a resilient contact force when the contactor is pressed against the contact target.
According to the present invention, the contact structure has a very high frequency bandwidth to meet the test requirements of next generation semiconductor technology. Since the large number of contactors are produced at the same time on the substrate without involving manual handling, it is possible to achieve consistent quality, high reliability and long life in the contact performance as well as low cost. Further, because the contactors are assembled on the same substrate material as that of the device under test, it is possible to compensate positional errors caused by temperature changes.
Further, according to the present invention, the production process is able to produce a large number of contactors in a horizontal direction on the silicon substrate by using relatively simple technique. Such contactors are removed from the substrate and mounted on a contact substrate in a vertical direction. The contact structure mounting the contactors produced by the present invention are low cost and high efficiency and have high mechanical strength and reliability.